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In synchronous mode, which input clock signal will the X-SABRE DACs use?
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The clock signal from the IIS LVDS port is input from the MCLK pins of HDMI connector. When the X-SABRE Pro/X-SABRE Pro (MQA)/X-SABRE 3 is connected to X-SPDIF 2/X-SPDIF3 via this port, the MCLK option of X-SPDIF 2/X-SPDIF3 should be set to Mode B.

The clock signal of audio from toslink, coaxial or AES/EBU input is demodulated from the audio signal.

When using USB Audio input, the clock signal is output by the XMOS chip. The clock sources are the 45M and 49M oscilliators in the X-SABRE Pro/X-SABRE Pro (MQA)/X-SABRE 3 unit.
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